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Nvidia’s Next Flagship Rack Is Delayed a Year. The Chip Jensen Huang Showed Onstage Was Also Scaled Back

Anderson Liam
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Semiconductor research firm SemiAnalysis published a thread on July 5 disclosing that Nvidia’s Kyber NVL144 rack architecture, the product Jensen Huang unveiled at GTC in March, has been delayed by more than 12 months and is now expected in 2028, not 2027 as planned. The root cause is a manufacturing problem with the rack’s specialized 78-layer PCB midplane, a multi-layer circuit board that coordinates high-speed data exchange between the 144 GPU packages packed into each unit. The design requires production precision that current Taiwanese facilities have not yet achieved at volume. Alongside the rack delay, SemiAnalysis disclosed that the 4-chip version of Rubin Ultra, the chip intended to anchor the Kyber system, has been cancelled entirely: Nvidia will ship only a 2-chip variant whose actual performance is approximately half that of the 4-chip design, and a separate back-to-back rack configuration called NVL72x2 has been scrapped. The combination of a rack delay, a chip downgrade, and a configuration cancellation is what NewsTrackerToday holds as the PCB midplane detail at the center of the disclosure: a single manufacturing challenge has cascaded across three simultaneous product decisions.

The GTC timing matters. Three months before SemiAnalysis’ disclosure, Jensen Huang stood on stage at the Nvidia GTC conference and presented the Kyber architecture to the world – including a physical demonstration of a Vera Rubin Ultra Kyber compute tray – with the implied launch timeline of 2027. SemiAnalysis’ research suggests that either Nvidia did not know the severity of the PCB problem at the time of the GTC presentation, or it believed the problem would be resolved quickly enough to hold the original schedule. Nvidia did not respond to a request for comment on the CNBC report, which is itself a notable absence of the usual corporate reassurance that delays involve manageable engineering challenges rather than a fundamental constraint. The scale-up gap that results from the Kyber delay – specifically, that Nvidia currently has no validated solution for expanding the Rubin Ultra scaling domain beyond the 2-chip configuration – is what SemiAnalysis explicitly cited as the competitive opening, and it is what NewsTrackerToday catches as the claim with the largest forward market implications.

Liam Anderson on the financial read: “Nvidia stock fell. SemiAnalysis published six consecutive posts on X before market open. The delay is analyst-reported, not Nvidia-confirmed. That distinction matters for short-term trading. The structural matter is different: Rubin Ultra’s 2-chip-only configuration running at half the intended performance for at least a year while Kyber is delayed means Nvidia’s upgrade cycle for its largest enterprise customers has a gap in it. AMD and Google fill gaps.” Current-generation Rubin systems are unaffected: they are in full production and begin shipping this fall to eight cloud partners including Amazon Web Services, Microsoft Azure, and Google Cloud. The delay specifically affects Rubin Ultra, the higher-performance next generation, and the Kyber rack that would house it.

Sophie Leclerc, who covers the technology sector, maps the competitive window: “AMD’s MI500X roadmap and Google’s in-house TPUv8i Broadfly architecture have been cited by SemiAnalysis as the most likely beneficiaries of the Nvidia delay. The key mechanism is rack-scale AI training: the largest AI training runs require clusters of thousands of tightly interconnected accelerators, and the interconnect architecture matters enormously. Kyber’s NVL144 was designed to maintain Nvidia’s dominant position in that scale-up world. Without it, hyperscalers that need to scale beyond the NVL72 configuration have a reason to evaluate alternatives they would not otherwise have prioritized. That evaluation window is what AMD and Google are positioned to fill.”

The Rubin Ultra 4-chip cancellation is the product change that warrants most attention alongside the rack delay. A chip designed to stack four compute chiplets with a total of 1 TB HBM4E memory was described publicly at GTC in demonstrations that did not clarify whether the shown package contained functional silicon or a mechanical model. Reducing to a 2-chip variant effectively cuts the peak performance ceiling in half for users who planned their AI infrastructure investment around the Kyber-era specifications. Hyperscalers that pre-ordered around Kyber timelines face an uncomfortable decision that mirrors the one created by the Pratt & Whitney GTF engine delays in aviation: wait for the product that was promised, or hedge into what is available. The AMD opening is what NewsTrackerToday reads as the consequential commercial window that Nvidia’s silence is not closing.

The uncomfortable implication of SemiAnalysis’ July 5 disclosure is not that Nvidia is in structural trouble. The company’s current-generation Rubin products are shipping and Nvidia’s market position remains dominant. The uncomfortable implication is that the annual product cadence Nvidia has maintained for three years – the quality of its execution discipline that justified its extraordinary market valuation above $3 trillion – has now visibly slipped. A product shown at a public conference three months ago is delayed a year, at the same time that the chip intended to go inside it has been scaled back by half. Both facts are currently analyst-reported rather than company-confirmed. But the absence of a denial from Nvidia is what News Tracker Today marks as the signal that distinguishes this from speculative research.

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